Usb hub and control method of usb hub

ABSTRACT

A USB (Universal Serial Bus) hub includes an upstream USB port connecting to an upstream device via an upstream USB line; a downstream USB port connecting to a downstream device via a downstream USB line; a clock generation circuit supplying a clock; a clock pin that supplies the clock received from the clock generation circuit for operating the downstream device to the downstream device; and a hub controller that automatically stops clock supply to the downstream device via the clock generation circuit and the clock pin, both when a connection between the upstream USB port and the upstream device is disconnected and when the hub controller receives a power save mode request to the downstream USB port from the upstream device, wherein the hub controller stops the clock supply whenever a stop of the data communication between the upstream device and the downstream device is detected by the hub controller.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a Continuation Application of U.S. patentapplication Ser. No. 13/533,861, filed on Jun. 26, 2012, which is basedon Japanese Patent Application No. 2011-186918 filed on Aug. 30, 2011,the entire contents of which are hereby incorporated by reference.

BACKGROUND

The present invention relates to a USB hub and a control method of USBhub, in particular to a USB hub and a control method of USB hub forconnecting an upstream device and a downstream device by USB.

In recent years, USB (Universal Serial Bus) is widely used as aninterface that connects between electronic devices. USB can connect ahost device and various peripheral devices (devices). USB is used forplug-and-play and bus power which supplies electrical power through aUSB cable. Further, the transfer speed of USB is improved. Therefore,USB is used in many devices. USB is used not only between electronicdevices, but also inside an electronic device. For example, an USBinterface is implemented in a semiconductor integrated circuit toconnect between semiconductor chips and to connect between functionalblocks inside a semiconductor chip.

A USB hub, which connects between a host device and a plurality ofperipheral devices in order to enable USB connecting between a hostdevice and many peripheral devices, is known. The USB hub has aplurality of USB ports to connect to a plurality of peripheral devices,so that even when the host device has only a small number of USB ports,the host device can connect to much more peripheral devices. The USB hubincludes a USB controller for controlling the USB connectings.

For example, Non-Patent Documents 1 and 2 are known as USB controllersof related art. In particular, Non-Patent Document 1 describes a hubcontroller that controls a USB hub. “Ethernet” is a registeredtrademark.

[Non-Patent Document 1]

-   SMSC, “USB 2.0 Hub and 10/100 Ethernet Controller    (LAN9512/LAN9512i)”, the Internet    <URL:http://www.smsc.com/media/Downloads_Public/Data_Sheets/9512.pdf>

[Non-Patent Document 2]

-   Intel, “Intel 5 Series Chipset and Intel 3400 Series Chipset”, the    Internet <URL:http://www.intel.com/Assets/PDF/datasheet/322169.pdf>

SUMMARY

Non-Patent Document 1 describes that a USB hub including a hubcontroller of the related art has a clock output terminal for supplyinga clock to a peripheral device. However, a specific method of supplyinga clock is not described.

Here, when a clock is supplied to a peripheral device, power is consumedby the supplied clock in the peripheral device. For example, in ananalog circuit into which a clock is inputted, when a signal isrepeatedly inverted, dynamic power consumption occurs. In other words,there is a strong correlation between a clock supplied from the USB huband power consumption in a peripheral device to which the clock issupplied.

Therefore, the inventors of the present invention found that powerconsumption of a USB system including a peripheral device can be reduceby controlling the clock supplied to the USB hub. For example, if theUSB hub supplies a clock to a peripheral device at all times withoutconsidering the states of the host device and the peripheral device,even when the clock is not required, the clock is uselessly supplied, sothat the power consumption cannot be reduced.

Therefore, a USB hub of the related art has a problem that when the USBhub supplies a clock to a peripheral device at all times, power isuselessly consumed in the peripheral device, so that it is difficult toreduce the power consumption in the USB system.

A USB hub according to the present invention includes an upstream USBport connecting to an upstream device via an upstream USB line, adownstream USB port connecting to a downstream device via a downstreamUSB line, a clock pin that supplies a clock for operating the downstreamdevice to the downstream device, and a hub controller that stops clocksupply to the downstream device via the clock pin when a connectingbetween the upstream USB port and the upstream device is disconnected orwhen the hub controller receives a power save mode request to thedownstream USB port from the upstream device.

A control method of USB hub according to the present invention is acontrol method of a USB hub connected between an upstream device and adownstream device. The control method includes the steps of supplying aclock for operating the downstream device to the downstream device, andstopping clock supply to the downstream device when a connecting betweenthe USB hub and the upstream device is disconnected or when a power savemode request to a downstream USB port of the USB hub is received fromthe upstream device.

In the present invention, when stop of the data communication betweenthe upstream device and the downstream device is detected, the clocksupply to the downstream device is stopped, so that it is possible tosuppress power consumption while the data communication is not performedand also reduce power consumption of the USB system.

According to the present invention, it is possible to provide a USB huband a control method of USB hub which can reduce power consumption in aUSB system.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a configuration diagram for explaining a configuration of aUSB connecting system according to a first embodiment of the presentinvention;

FIG. 2 is a configuration diagram for explaining a configuration of aUSB hub according to the first embodiment of the present invention;

FIG. 3 is a flowchart for explaining an operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 4 is a diagram for explaining the operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 5 is a timing chart for explaining the operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 6 is a flowchart for explaining an operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 7 is a diagram for explaining the operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 8 is a timing chart for explaining the operation of the USB hubaccording to the first embodiment of the present invention;

FIG. 9 is a flowchart for explaining an operation of a USB hub accordingto a second embodiment of the present invention;

FIG. 10 is a diagram for explaining the operation of the USB hubaccording to the second embodiment of the present invention;

FIG. 11 is a timing chart for explaining the operation of the USB hubaccording to the second embodiment of the present invention;

FIG. 12 is a flowchart for explaining an operation of the USB hubaccording to the second embodiment of the present invention;

FIG. 13 is a diagram for explaining the operation of the USB hubaccording to the second embodiment of the present invention;

FIG. 14 is a timing chart for explaining the operation of the USB hubaccording to the second embodiment of the present invention; and

FIG. 15 is a configuration diagram for explaining a configuration of aUSB hub according to a third embodiment of the present invention.

DETAILED DESCRIPTION First Embodiment

Hereinafter, a first embodiment of the present invention will bedescribed with reference to the drawings.

FIG. 1 shows a configuration of a USB connecting system according to thefirst embodiment of the present invention. As shown in FIG. 1, the USBconnecting system 100 includes a USB host 20, a USB hub 10, and USBperipheral devices 30-1, 30-2, . . . , and 30-N (any one of the USBperipheral devices may be referred to as a peripheral device 30). In theUSB connecting system 100, the USB host 20 side of the USB hub 10 isreferred to as upstream and the USB peripheral device 30 side of the USBhub 10 is referred to as downstream.

The USB host (upstream device) 20 is a device that accesses any USBperipheral device 30 via a USB line according to USB protocol andperforms data communication with the peripheral device. The USB host 20is, for example, an information processing device such as a personalcomputer. When a peripheral device is connected to the USB host 20 via aUSB line, the USB host 20 performs an enumeration process according toUSB protocol, so that the USB host 20 recognizes the connected USBdevice and provides a peripheral device specific number for identifyingthe peripheral device. Data communication with an end point of theperipheral device is performed by using the peripheral device specificnumber.

In the present embodiment, the USB hub 10 and the USB peripheral device30 are disposed over a circuit board 40. In other words, in thisexample, the USB hub 10 and the USB peripheral device 30 are fixed andconnected to each other at all times and they are non-removable.Further, the USB host 20 may also be disposed over the circuit board 20and the USB host 20, the USB hub 10, and the USB peripheral device 30may be set to non-removable.

The USB hub 10 and the USB peripheral device 30 may be connected by acable to be removable. In this case, if a clock line is disconnectedwhile the USB peripheral device 30 is operating, the operation of theUSB peripheral device 30 is not guaranteed. Therefore, it is preferredthat the clock line is disconnected while the clock supply is stopped.

The USB peripheral device (downstream device) 30 receives an access fromthe USB host 20 via the USB line according to USB protocol and performsdata communication with the USB host. The USB peripheral device 30 is,for example, a data storage device such as a flash memory. The USBperipheral device 30 operates by a clock supplied from the USB hub 10.For example, the USB peripheral device 30 is a semiconductor devicedisposed over the circuit board 40. The clock is supplied to a USBcontroller (IC) for the peripheral device and the data communication byUSB is enabled. When the USB peripheral device 30 is provided with apower source, the USB peripheral device 30 operates by self power. Onthe other hand, when the USB peripheral device 30 has no power source,the USB peripheral device 30 operates by bus power supplied from the USBline.

The USB hub 10 is a relay device that relays the data communicationbetween the USB host 20 and the USB peripheral devices via USB linesaccording to USB protocol. The USB hub 10 includes an upstream USB port11, downstream USB ports 12-1, 12-2, . . . , 12-N (any one of thedownstream USB ports may be referred to as a downstream USB port 12),and clock pins 13-1, 13-2, . . . , 13-N (any one of the clock pins maybe referred to as a clock pin 13).

The upstream USB port 11 is a terminal for connecting to a USB line. Theupstream USB port 11 is connected to the USB host 20 via an upstream USBline 1 to enable data communication with the USB host 20 by USBprotocol. In this example, the upstream USB line 1 is a normal USB cableand removable from the USB port 11.

The upstream USB line 1 is a bus line including a plurality of signallines according to USB protocol and includes a signal line that suppliesVBUS power and a data signal line that inputs/outputs data.

The downstream USB ports 12-1, 12-2, . . . , 12-N are terminals forconnecting to USB lines and are respectively connected to the USBperipheral devices 30-1, 30-2, . . . , and 30-N via downstream USB lines2-1, 2-2, . . . , 2-N to enable data communication with the USBperipheral devices 30-1, 30-2, . . . , and 30-N by USB protocol. In thisexample, the downstream USB line 2 is a line over the circuit board andis not removable. The downstream USB line 2 includes a signal line ofVBUS power and a data signal line in the same manner as the upstream USBline 1.

The clock pins 13-1, 13-2, . . . , 13-N are terminals for connecting toclock lines and are respectively connected to the USB peripheral devices30-1, 30-2, . . . , and 30-N via clock lines 3-1, 3-2, . . . , 3-N tosupply a clock to the USB peripheral devices 30-1, 30-2, . . . , and30-N. In this example, the clock line 3 is a line over the circuit boardand is not removable. The clock pin 13 is provided for each downstreamUSB port 12 and for each USB peripheral device 30. The clock may besupplied from one clock pin 13 to a plurality of USB peripheral devices30.

FIG. 2 shows a configuration of the USB hub according to the firstembodiment of the present invention. The USB hub 10 includes theupstream USB port 11, the downstream USB ports 12, and the clock pins 13as described above, and further includes an upstream USB transceiver 14,downstream USB transceivers 15-1, 15-2, . . . , 15-N (any one of thedownstream USB transceivers may be referred to as a downstream USBtransceiver 15), a hub controller 17, and a clock generation circuit 18.

The USB hub 10 is a semiconductor device disposed over the circuit board40. For example, the entire configuration of the USB hub 10 may beformed into one chip, the hub controller 17, the upstream USBtransceiver 14, and the downstream USB transceivers 15 may be formedinto one chip, or the hub controller 17 may be formed into one chip.

The upstream USB transceiver 14 is a transmission/reception circuit thattransmits and receives data to and from the upstream USB line 1 via theupstream USB port 11. The downstream USB transceiver 15 is atransmission/reception circuit that transmits and receives data to andfrom the downstream USB line 2 via the downstream USB port 12.

The hub controller 17 is a control circuit that controls datacommunication between the USB host 20 and the USB peripheral devices 30.For example, the hub controller 17 controls enumeration with the USBhost 20, recognition of the USB peripheral devices 30, and clock supplyto the USB peripheral devices 30.

The enumeration is a process of data transmission and reception toestablish a communication path when a USB line is connected. It ispossible to recognize information of a peripheral device connectedthrough a USB line by the enumeration.

The clock generation circuit 18 generates a clock having a desiredfrequency. The clock generation circuit 18 supplies a clock to the USBperipheral device 30 via the clock pin 13 according to the control fromthe hub controller 17. The hub controller 17 instructs each port tostart or stop the clock supply. All the USB peripheral devices 30 can beoperated by the clock of the clock generation circuit 18, so that it isnot necessary to provide a clock generation circuit in each of the USBperipheral devices 30.

Next, an operation of the USB hub 10 when the USB hub 10 is connected tothe USB host 20 will be described with reference to FIGS. 3 to 5. FIG. 3shows a flow of the operation of the USB hub 10 in this case.

First, the USB hub 10 is connected to the USB host 20 (S101). When theUSB hub 10 is not physically connected to the USB host 20 via theupstream USB line 1, the upstream USB line 1 is inserted into the USBport of the USB host 20 and the upstream USB port 11 of the USB hub 10to physically couple the USB hub 10 to the USB host 20. If the USB host20 is turned off, the USB host 20 is turned on, so that the USB host 20and the USB hub 10 are electrically connected to each other.

In other words, connecting the USB devices to each other includesphysically connecting between the USB devices by a USB line andelectrically connecting between the USB devices which are physicallyconnected. When the upstream USB line 1 is connected or the USB host 20is turned on, the VBUS power of the upstream USB line 1 is turned on andthe USB hub 10 detects a connecting with the USB host 20.

Next, the USB host 20 recognizes the USB hub 10 (S102). The USB host 20and the USB hub 10 are connected, so that the USB host 20 performsenumeration with the USB hub 10, acquires device information of the USBhub 10, provides specific information, and recognizes the USB hub 10.Thereby, the USB hub 10 also recognizes the USB host 20.

Next, the USB hub 10 receives a port power enable request from the USBhost 20 (S103). The USB host 20 recognizes the USB hub 10, so that theUSB host 20 further transmits a port power enable request of thedownstream USB ports 12 of the USB hub 10.

Next, the USB hub 10 turns on the downstream USB ports 12 (S104). TheUSB hub 10 receives the port power enable request from the USB host 20,so that the USB hub 10 turns on the VBUS power of all the downstream USBports 12.

Next, the USB hub 10 starts clock supply to the USB peripheral devices30 (S105). As described later, in the present embodiment, the USB hub 10stops clock supply to the USB peripheral devices 30 before the USB hub10 is connected to the USB host 20. Therefore, the USB hub 10 turns onthe VBUS power of the downstream USB lines 2 and starts clock supplyfrom all the clock pins 13 to operate the USB peripheral devices 30.

Next, the USB host 20 recognizes the USB peripheral devices 30 via theUSB hub 10 (S106). The VBUS power of the USB lines 3 is turned on andthe clock is supplied, so that the USB peripheral devices 30 startoperation and can communicate with the USB host 20 via the USB hub 10.The USB host 20 and the USB peripheral devices 30 are connected, so thatthe USB host 20 performs enumeration with the USB peripheral devices 30,acquires device information of the USB peripheral devices 30, providesspecific information, and recognizes the USB peripheral devices 30.

FIG. 4 shows a detailed operation of the USB hub 10 when the USB hub 10is connected to the USB host 20.

First, the USB hub 10 is connected to the USB host 20 (FIG. 4 (1)). Whenthe upstream USB line 1 is connected between the USB host 20 and the USBhub 10, the upstream USB transceiver 14 detects that the VBUS power ofthe upstream USB line 1 is turned on and notifies the hub controller 17of this detection result. At this time, the hub controller 17 becomes ina state of waiting for completion of the enumeration with the USB host20.

Then the enumeration is performed by the USB host 20 and the hubcontroller 17 and the USB host 20 recognizes the USB hub 10. At thistime, the hub controller 17 becomes in a state in which the enumerationwith the USB host 20 is completed.

Next, the USB hub 10 receives the port power enable request from the USBhost 20 (FIG. 4 (2)). The USB host 20 transmits the port power enablerequest whose destination is the USB hub 10. The hub controller 17analyzes the destination and the content of the request received via theupstream USB transceiver 14 and performs a process corresponding to theport power enable request transmitted to the USB hub 10.

Next, the USB hub 10 turns on the downstream USB port 12 of the USB hub10 (FIG. 4 (3)). The hub controller 17 instructs that the downstream USBports 12 be turned on according to the received port power enablerequest and turns on the VBUS power of the downstream USB ports 12.

Next, the USB hub 10 starts clock supply to the USB peripheral devices30 (FIG. 4 (4)). After turning on the downstream USB ports 12, the hubcontroller 17 instructs the clock generation circuit 18 to supply aclock. The clock generation circuit 18 starts clock supply to the USBperipheral devices 30 from all the clock pins 13.

Thereby the operations of the USB peripheral devices are started andwhen the enumeration is performed between the USB host 20 and the USBperipheral devices 30, the USB host 20 recognizes the USB peripheraldevices 30 connected to the USB host 20.

FIG. 5 shows operation timing of each signal line when the USB hub 10 isconnected to the USB host 20.

When the upstream USB line 1 is connected to the USB hub 10, the VBUSpower of the upstream USB line 1 rises to high at t1.

The VBUS power of the upstream USB line 1 rises to high, so that the USBhost 20 recognizes the USB hub 10 by the enumeration at t2 and the portpower enable request is outputted from the USB host 20 to the USB hub 10on the data signal line.

When the USB hub 10 receives the port power enable request from the datasignal line of the upstream USB line 1, the USB hub 10 raises the VBUSpower of the downstream USB lines 2 to high at t3.

After raising the VBUS power of the downstream USB lines 2, the USB hub10 starts clock supply to the clock lines 3 at t4.

Here, although the timing of raising the VBUS power and the timing ofstarting the clock supply may be the same, it is preferable that theclock supply is started after the VBUS power is raised. For example, ifthe clock is supplied before the VBUS power is raised, there is a riskthat a clock buffer to which the clock is inputted is broken dependingon the specification of the peripheral device, so that the clock may besupplied after the VBUS power is raised.

When the clock supply is started, the USB peripheral devices 30 startoperation at t5 and the USB host 20 recognizes the USB peripheraldevices 30 by the enumeration.

Next, an operation of the USB hub 10 when the USB hub 10 is disconnectedfrom the USB host 20 will be described with reference to FIGS. 6 to 8.FIG. 6 shows a flow of the operation of the USB hub 10 in this case.

First, the USB hub 10 is disconnected from the USB host 20 (S111). Forexample, the upstream USB line 1 is pulled out from the USB port of theUSB host 20 or the upstream USB port 11 of the USB hub 10 to physicallydisconnect the USB hub 10. Or, the USB host 20 is turned off, so thatthe USB host 20 and the USB hub 10 are electrically disconnected fromeach other.

In other words, disconnecting the USB devices from each other includesphysically disconnecting the USB devices from each other by a USB lineand electrically disconnecting the USB devices from each other, whichare physically connected. When the upstream USB line 1 is disconnectedor the USB host 20 is turned off, the VBUS power of the upstream USBline 1 is turned off and the USB hub 10 detects a disconnecting from theUSB host 20. Thereby the communication between the USB host 20 and theUSB hub 10 is disabled. Also, the communication between the USB host 20and the USB peripheral devices 30 and the communication between the USBhub 10 and the USB peripheral devices 30 are disabled. In other words,the data communication between the USB host 20 and the USB peripheraldevices 30 is stopped.

Next, the USB hub 10 turns off the downstream USB ports 12 (S112). Theupstream USB line 1 between the USB host 20 and the USB hub 10 isdisconnected and the data communication between the USB host 20 and theUSB peripheral devices 30 is stopped, so that the USB hub 10 turns offthe VBUS power of all the downstream USB ports 12.

Next, the USB hub 10 stops the clock supply to the USB peripheraldevices 30 (S113). The USB hub 10 turns off the VBUS power of thedownstream USB lines 2 and stops the clock supply from all the clockpins 13 to stop the operations of the USB peripheral devices 30.

FIG. 7 shows a detailed operation of the USB hub 10 when the USB hub 10is disconnected from the USB host 20.

First, the USB hub 10 is disconnected from the USB host 20 (FIG. 7 (1)).When the upstream USB line 1 between the USB host 20 and the USB hub 10is disconnected, the upstream USB transceiver 14 detects that the VBUSpower of the upstream USB line 1 is turned off and notifies the hubcontroller 17 of this detection result. At this time, the hub controller17 determines that the data communication between the USB host 20 andthe USB hub 10 is stopped and the data communication between the USBhost 20 and the USB peripheral devices 30 is also stopped.

Next, the USB hub 10 turns off the downstream USB ports 12 (FIG. 7 (2)).Since the data communication between the USB host 20 and the USBperipheral devices 30 is stopped, the hub controller 17 instructs thatthe downstream USB ports 12 be turned off and turns off the VBUS powerof the downstream USB ports 12. When the VBUS power is turned off, theUSB peripheral device 30 detects that the downstream USB line 2 isdisconnected

Next, the USB hub 10 stops the clock supply to the USB peripheraldevices 30 (FIG. 7 (3)). Since the data communication between the USBhost 20 and the USB peripheral devices 30 is stopped, after turning offthe downstream USB ports 12, the hub controller 17 instructs the clockgeneration circuit 18 to stop the clock supply and the clock generationcircuit 18 stops the clock supply from all the clock pins 13 to the USBperipheral devices 30.

FIG. 8 shows operation timing of each signal line when the USB hub 10 isdisconnected from the USB host 20.

When the upstream USB line 1 is disconnected, the VBUS power of theupstream USB line 1 drops to low at t11.

Since the VBUS power of the upstream USB line 1 drops to low, the USBhub 10 drops the VBUS power of the downstream USB lines 2 to low at t12.

After dropping the VBUS power of the downstream USB lines 2, the USB hub10 stops the clock supply to the clock lines 3 at t13.

Here, the timing of dropping the VBUS power and the timing of stoppingthe clock supply may be the same. When the clock supply is stopped, theoperations of the USB peripheral devices 30 are stopped, so that thepower consumption while the operations are stopped is suppressed.

As described above, in the present embodiment, the USB hub controls theclock supply to the USB peripheral devices according to the state ofconnecting to the USB host. In USB, the USB peripheral devices do notcommunicate with each other and the USB host and the USB peripheraldevices are connected and communicate with each other, so that it ispossible to determine whether or not there is communication of the USBperipheral devices from the state of connecting to the USB host.

Specifically, when the USB hub is connected to the USB host, the USB hubstarts clock supply to the USB peripheral devices to start communicationoperation with the USB peripheral devices, and when the connecting tothe USB host is disconnected, the USB hub stops the clock supply to theUSB peripheral devices to stop the communication operation with the USBperipheral devices. Thereby, while the communication of the USBperipheral devices is stopped by disconnecting the USB line, by stoppingthe clock supply, it is possible to reduce the power consumption of theUSB peripheral devices and save the power consumption of the entire USBsystem.

Second Embodiment

Hereinafter, a second embodiment of the present invention will bedescribed with reference to the drawings. Although, in the firstembodiment, the clock supply to the peripheral devices is controlledaccording to the state of connecting between the USB host and the USBhub, in the present embodiment, the clock supply to the peripheraldevices is also controlled when a downstream USB port is set to asuspend state (a sleep state) by a port suspend (port sleep) requestfrom the USB host. The configuration of the USB connecting system andthe configuration of the USB hub are the same as those shown in FIGS. 1and 2.

An operation of the USB hub 10 when the downstream USB port 12 issuspended will be described with reference to FIGS. 9 to 11. FIG. 9shows a flow of the operation of the USB hub 10 in this case.

First, the USB hub 10 receives a port suspend request from the USB host20 (S201). In order to suspend the downstream USB port 12 of the USB hub10, the USB host 20 transmits the port suspend request that specifiesthe downstream USB port 12 to be suspended.

Next, the USB hub 10 suspends the requested downstream USB port 12(S202). The USB hub 10 receives the port suspend request from the USBhost 20, so that the USB hub 10 performs a suspend process on thedownstream USB port 12 specified by the port suspend request. The USBhub 10 performs a predetermined suspend process between the downstreamUSB port 12 and the USB peripheral device 30 connected to the downstreamUSB port 12 and sets the downstream USB port 12 to a suspend state.

Suspending the USB port means setting the USB port to a suspend mode (asleep mode) from a normal state which is a normal operation mode. TheUSB hub 10 exchanges information necessary to suspend the USB port withthe USB peripheral device, so that the USB port and the USB peripheraldevice are set to the suspend state. The suspend state is a power savingstate. In the suspend state, the power consumption is reduced bytemporarily halting the communication operation and stopping powersupply to a predetermined circuit.

When the downstream USB port 12 is suspended, the communication betweenthe USB hub 10 and the USB peripheral device 30 is temporarily haltedand also the communication between the USB host 20 and the USBperipheral device 30 is halted. In other words, the data communicationbetween the USB host 20 and the USB peripheral devices 30 is stopped.

Next, the USB hub 10 stops the clock supply to the USB peripheraldevices 30 (S203). In order to stop the operation of the USB peripheraldevice 30, the USB hub 10 stops clock supply from a clock pin 13corresponding to the suspended downstream USB port 12.

FIG. 10 shows a detailed operation of the USB hub 10 when the USB hub 10suspends the downstream USB port 12.

First, the USB hub 10 receives the port suspend request from the USBhost 20 (FIG. 10 (1)). The USB host 20 transmits the port suspendrequest whose destination is the USB hub 10 and which specifies thedownstream USB port 12. The hub controller 17 analyzes the destinationand the content of the request received via the upstream USB transceiver14 and performs a process corresponding to the port suspend requesttransmitted to the USB hub 10.

Next, the USB hub 10 suspends the requested downstream USB port 12 (FIG.10 (2)). The hub controller 17 instructs a USB transceiver 15corresponding to the specified downstream USB port 12 to perform asuspend process according to the received port suspend request. The USBtransceiver 15 performs the suspend process between the downstream USBport 12 and the USB peripheral device 30 and sets the downstream USBport 12 to a suspend state.

Next, the USB hub 10 stops the clock supply to the USB peripheraldevices 30 (FIG. 10 (3)). The hub controller 17 instructs the clockgeneration circuit 18 to stop the clock supply. The clock generationcircuit 18 stops the clock supply to the USB peripheral device 30 from aclock pin corresponding to the suspended downstream USB port 12.

FIG. 11 shows operation timing of each signal line when the downstreamUSB port 12 is suspended.

The USB hub 10 receives the port suspend request that specifiesdownstream USB port 12 on the data signal line of the upstream USB line1 at t21.

The USB hub 10 performs the suspend process on the data signal line ofthe downstream USB line 2 at t22 according to the received port suspendrequest, so that the downstream USB port 12 is suspended.

When the port is suspended, the USB hub 10 stops the clock supply to aclock line 3 corresponding to the suspended downstream USB port 12 att23.

When the clock supply is stopped, the operation of the USB peripheraldevice 30 is stopped, so that the power consumption while the operationis stopped is suppressed.

Next, an operation of the USB hub 10 when the downstream USB port 12 isresumed will be described with reference to FIGS. 12 to 14. FIG. 12shows a flow of the operation of the USB hub 10 in this case.

First, the USB hub 10 receives a port resume request from the USB host20 (S211). In order to resume the downstream USB port 12 of the USB hub10, the USB host 20 transmits the port resume request that specifies thedownstream USB port 12 that will be resumed.

Next, the USB hub 10 restarts the clock supply to the USB peripheraldevice 30 connected to the requested downstream USB port 12 (S212). Inorder to operate the USB peripheral device 30, the USB hub 10 startsclock supply from a clock pin 13 corresponding to the downstream USBport 12 that will be resumed.

Next, the USB hub 10 resumes the requested downstream USB port 12(S213). The USB hub 10 receives the port resume request from the USBhost 20 and the clock supply is restarted, so that the USB hub 10performs a resume process on the downstream USB port 12 specified by theport resume request. The USB hub 10 performs a predetermined resumeprocess between the downstream USB port 12 and the USB peripheral device30 connected to the downstream USB port 12 and sets the downstream USBport 12 to a normal communication state.

Resuming the USB port means setting the USB port to a normal state,which is a normal operation mode, from the suspend mode. The USB hub 10exchanges information necessary to resume with the USB peripheraldevice, so that the USB port and the USB peripheral device are set tothe normal state. When they are resumed, the halt of the communicationoperation is cancelled and the data communication is enabled.

When the downstream USB port 12 is resumed, the data communicationbetween the USB hub 10 and the USB peripheral device 30 is restarted andalso the communication between the USB host 20 and the USB peripheraldevice 30 is restarted. In other words, the stop of the datacommunication between the USB host 20 and the USB peripheral devices 30is terminated.

FIG. 13 shows a detailed operation of the USB hub 10 when the USB hub 10resumes the downstream USB port 12.

First, the USB hub 10 receives the port resume request from the USB host20 (FIG. 13 (1)). The USB host 20 transmits the port resume requestwhose destination is the USB hub 10 and which specifies the downstreamUSB port 12. The hub controller 17 analyzes the destination and thecontent of the request received via the upstream USB transceiver 14 andperforms a process corresponding to the port resume request transmittedto the USB hub 10.

Next, the USB hub 10 restarts the clock supply to the USB peripheraldevice 30 connected to the requested downstream USB port 12 (FIG. 13(2)). The hub controller 17 instructs the clock generation circuit 18 tostart the clock supply. The clock generation circuit 18 starts the clocksupply to the USB peripheral device 30 from a clock pin corresponding tothe downstream USB port 12 that will be resumed.

Next, the USB hub 10 resumes the requested downstream USB port 12 (FIG.13 (3)). The hub controller 17 instructs a USB transceiver 15corresponding to the specified downstream USB port 12 to perform aresume process according to the received port resume request. The USBtransceiver 15 performs the resume process between the downstream USBport 12 and the USB peripheral device 30 and sets the downstream USBport 12 to the normal state.

FIG. 14 shows operation timing of each signal line when the downstreamUSB port 12 is resumed.

The USB hub 10 receives the port resume request that specifiesdownstream USB port 12 on the data signal line of the upstream USB line1 at t31.

According to the received port resume request, at t32, the USB hub 10starts the clock supply to a clock line 3 corresponding to thedownstream USB port 12 that will be resumed.

The resume process is performed on the data signal line of thedownstream USB line 2 at t33, so that the downstream USB port 12 isresumed and the downstream USB port 12 is set to a normal datacommunication state.

As described above, in the present embodiment, the USB hub controls theclock supply to the USB peripheral device according to the suspend stateof the USB port. Specifically, when the USB hub receives a suspendrequest to the USB port from the USB host, the USB hub stops the clocksupply to the USB peripheral device, and when the USB hub receives aresume request to the USB port from the USB host, the USB hub starts theclock supply to the USB peripheral device. Thereby, while thecommunication of the USB peripheral device is stopped by the suspend ofthe USB port, by stopping the clock supply, it is possible to reduce thepower consumption of the USB peripheral device and save the powerconsumption of the entire USB system.

Third Embodiment

Hereinafter, a third embodiment of the present invention will bedescribed with reference to the drawings. In the third embodiment, inaddition to the first and the second embodiments, the frequency of theclock supplied to the peripheral device from the USB hub can be set.

FIG. 15 shows a configuration of the USB hub according to the thirdembodiment of the present invention. The USB hub 10 includes settingterminals C1, C2, and C3 for setting the clock frequency in addition tothe configuration shown in FIG. 2.

The hub controller 17 determines the frequency of the clock according toan input value (input voltage) of the setting terminals C1 to C3. Thehub controller 17 notifies the clock generation circuit 18 of thedetermined frequency and the clock generation circuit 18 supplies aclock of the notified frequency to the USB peripherals 30. Clocks CLK1to CLKN are outputted from the clock pins 13-1 to 13-N.

The frequency of the clock may be different for each clock pin (for eachUSB port). For example, the setting terminals, the number of which isthe same as that of the downstream USB ports, are provided, thefrequency of the clock CLK1 is determined by the setting terminal C1,the frequency of the clock CLK2 is determined by the setting terminalC2, and the frequency of the clock CLKN is determined by the settingterminal CN. In this case, for example, when the input of the settingterminal C1 is high, the frequency may be set to 12 MHz, when the inputof the setting terminal C1 is low, the frequency may be set to 24 MHz,when the input of the setting terminal C2 is high, the frequency may beset to 12 MHz, and when the input of the setting terminal C2 is low, thefrequency may be set to 30 MHz. The clock frequency is set for each USBport, so that the clock frequency can be more finely set according tothe USB peripheral device to be connected.

The frequency of the clock may be the same for all the clock pins 13.For example, the clock frequency of all the clock pins is collectivelydetermined by using the setting terminals C1 and C2. The frequency isdetermined by a combination of a plurality of setting terminals, so thatthe frequency can be set by a small number of terminals. An example ofthe relationship between a combination of input levels of the settingterminals C1 and C2 and the frequency is as follows: When (settingterminal C2, setting terminal C1) is (low, low), the frequency is 12MHz, when (setting terminal C2, setting terminal C1) is (low, high), thefrequency is 24 MHz, when (setting terminal C2, setting terminal C1) is(high, low), the frequency is 30 MHz, and when (setting terminal C2,setting terminal C1) is (high, high), the frequency is 48 MHz.

Other than the above, as a method for setting the clock frequency, theclock frequency may be set by a storage device such as a register, ormay be set by a command such as the port power enable request from theUSB host.

As described above, in the present embodiment, in the same manner as inthe first and the second embodiments, the USB hub controls the clocksupplied to the USB peripheral device, so that the power consumption canbe reduced and the frequency of the clock to be supplied can be set.Thereby it is possible to flexibly select a clock according to thespecification of the peripheral device.

The present invention is not limited to the above embodiments, but canbe appropriately modified without departing from the scope of theinvention. For example, although, in the above examples, the USB hostand the USB peripherals are connected by one USB hub, a plurality of USBhubs may be cascaded. In this case, an upstream device and a downstreamdevice can be a USB hub.

The clock supply may be stopped according to the USB peripheral device.For example, the clock supply is not stopped in the case of a devicewhich may be subject to malfunction or difficult to be restarted oncethe clock supply is stopped, and the clock supply may be stopped only inthe case of a device which can operate normally even if the clock supplyis stopped.

What is claimed is:
 1. A USB (Universal Serial Bus) hub comprising: anupstream USB port connecting to an upstream device via an upstream USBline; a downstream USB port connecting to a downstream device via adownstream USB line; a clock generation circuit supplying a clock; aclock pin that supplies the clock received from the clock generationcircuit for operating the downstream device to the downstream device;and a hub controller that automatically stops clock supply to thedownstream device via the clock generation circuit and the clock pin,both when a connection between the upstream USB port and the upstreamdevice is disconnected and when the hub controller receives a power savemode request to the downstream USB port from the upstream device,wherein the hub controller stops the clock supply whenever a stop of thedata communication between the upstream device and the downstream deviceis detected by the hub controller including when the hub controllerreceives the power save mode request to the downstream USB port from theupstream device to stop the data communication, wherein when stoppingthe clock, the hub controller instructs the clock generation circuit tostop the clock supply and the clock generation circuit stops the clocksupply from all the clock pins, and wherein the hub controller turns ona power line included in the downstream USB line and starts the clocksupply to the downstream device when the upstream USB port and theupstream device are connected.
 2. The USB hub according to claim 1,wherein the hub controller stops the clock supply to the downstreamdevice when a power line included in the upstream USB line is off, andwherein the hub controller stops the clock supply whenever the stop ofthe data communication between the upstream device and the downstreamdevice is detected by the hub controller when the upstream device isdisconnected and whenever the hub controller receives the power savemode request.
 3. The USB hub according to claim 1, wherein the hubcontroller stops the clock supply to the downstream device when thedownstream device goes into a power save mode, and wherein the hubcontroller automatically stops the clock supply according to a state ofthe upstream device and a state of the downstream device.
 4. The USB hubaccording to claim 1, wherein when the connection between the upstreamUSB port and the upstream device is disconnected, the hub controllerturns off a power line included in the downstream USB line and stops theclock supply to the downstream device.
 5. The USB hub according to claim4, wherein the hub controller stops the clock supply to the downstreamdevice after the hub controller turns off the power line included in thedownstream USB line.
 6. The USB hub according to claim 1, furthercomprising: a plurality of the downstream USB ports connecting to aplurality of the downstream devices respectively, wherein the hubcontroller stops the clock supply to the plurality of the downstreamdevices.
 7. The USB hub according to claim 1, further comprising: aplurality of the downstream USB ports connecting to a plurality of thedownstream devices respectively, wherein the hub controller stops theclock supply to a part of the plurality of the downstream devices. 8.The USB hub according to claim 1, wherein the hub controller starts theclock supply to the downstream device when the upstream USB port and theupstream device are connected.
 9. The USB hub according to claim 1,wherein the hub controller starts the clock supply to the downstreamdevice when the hub controller receives a power enable request to thedownstream USB port from the upstream device.
 10. The USB hub accordingto claim 1, wherein the hub controller starts the clock supply to thedownstream device when the hub controller receives a power save modecancel request to the downstream USB port from the upstream device. 11.The USB hub according to claim 8, wherein the hub controller starts theclock supply to the downstream device after turning on the power lineincluded in the downstream USB line.
 12. The USB hub according to claim8, further comprising: a plurality of the downstream USB portsconnecting to a plurality of the downstream devices respectively,wherein the hub controller starts the clock supply to the plurality ofthe downstream devices.
 13. The USB hub according to claim 8, furthercomprising: a plurality of the downstream USB ports connecting to aplurality of the downstream devices respectively, wherein the hubcontroller starts the clock supply to a part of the plurality of thedownstream devices.
 14. The USB hub according claim 1, wherein the hubcontroller can set a clock frequency of the clock supplied to thedownstream device.
 15. The USB hub according to claim 14, furthercomprising: a clock frequency setting terminal for setting the clockfrequency, wherein the hub controller sets the clock frequency accordingto a voltage level of the clock frequency setting terminal.
 16. The USBhub according to claim 15, further comprising: a plurality of the clockfrequency setting terminals, wherein the hub controller sets the clockfrequency according to a combination of voltage levels of the pluralityof the clock frequency setting terminals.
 17. The USB hub according toclaim 14, further comprising: a plurality of the clock pins that supplya plurality of clocks including the clock to a plurality of thedownstream devices, respectively, wherein the hub controller sets theplurality of clocks supplied to the downstream devices to the samefrequency.
 18. The USB hub according to claim 14, further comprising: aplurality of the clock pins that supply a plurality of the clocks to aplurality of the downstream devices, respectively, wherein the hubcontroller sets frequencies of the plurality of the clocks supplied tothe downstream devices independently from each other.
 19. A controlmethod of a USB (Universal Serial Bus) hub connected between an upstreamdevice and a downstream device, the control method comprising: supplyinga clock, for operating the downstream device, from the USB hub; andautomatically stopping clock supply to the downstream device whenever adata communication between the downstream device and the upstream deviceis stopped including when a hub controller receives a suspend request toa downstream USB port from the upstream device to stop the datacommunication, wherein when stopping the clock, the hub controllerinstructs a clock generation circuit to stop the clock supply and theclock generation circuit stops the clock supply from all clock pinsproviding the clock to the downstream device, wherein an upstream USBport connects to the upstream device via an upstream USB line, whereinthe downstream USB port connects to the downstream device via adownstream USB line, and wherein the hub controller turns on a powerline included in the downstream USB line and starts the clock supply tothe downstream device when the upstream USB port and the upstream deviceare connected.